In general every analog block within an integrated circuit needs a current bias to allow for proper operation. A main current bias distribution within a chip can be a current source that is distributed within an integrated circuit chip by means of a few current mirror circuits. The bias current causes additional power consumption.
Because the bias current is additional power consumption for the chip, the actual used value is small, especially in very low power design, which can be down to a few tenths of a nano-amp. Such a small current is prone to being disturbed by other circuitry on the chip and sometimes by the biased block itself. In order to filter such a noise disturbance a simple low pass filter usually created by normal capacitor or MOS capacitor is added.
US 2011/0006749A1 (Stellberger et al.) is directed to systems and methods to achieve a start-up circuit of bandgap voltage reference generator circuits. US 2003/0067291A1 (Hong) is directed to a bandgap voltage reference circuit and a fast start-up circuit. U.S. Pat. No. 6,057,721 (Nolan et al.) is directed to a fast start-up circuit for use in integrated circuits. U.S. Pat. No. 6,016,050 (Brokaw) is directed to a Start-up and bias circuit that provides a fixed bias current. U.S. Pat. No. 5,892,381 (Koifman et al.) is directed to faster start-up without added circuit complexity. U.S. Pat. No. 5,281,866 (Rundel) is directed to a reference voltage circuit in an analog to digital converter.
In FIG. 1 is shown a bias circuit of prior art, wherein a main current bias, lbias, is distributed by means of current mirrors like P1 and P2. Since the bias current is additional power consumption, the actual amount used is reasonably small, especially in very low power design that can be down to few tenths of nano-amps. These small current amounts are prone to be disturbed by other circuitry on the chip, which can be sometimes disturbed by the biased block itself. A simple low pass filter, usually created by a normal capacitor or MOS capacitor is added to filter noise and disturbance from other circuitry. This capacitor might be also created by the input gate capacitance of all the mirror transistors which are connected to the nbias node so it disappears from the schematic, but it is still present. It is depicted in FIG. 1 as C1. This low pass filter filters the nbias node voltage and makes the currents lbias_2 and lbias_x less noisy.
Using capacitance C1 to filter noise has a drawback, which is long start-up time of the circuit. When the block is disabled, the disable switch S2 is ON and enable switch S1 is OFF. This means the nbias voltage is 0V, and voltage at nswitch is equal to Vdd. When the current bias is enabled, the disable switch S2 is turned OFF and enable switch S1 is turned ON. Bias current starts flowing from drain of P2, which starts the charging of C1. At that moment no current is flowing through lbias_2 through lbias_x branches. The voltage in nbias is increasing as C1 is being charged and finally at the moment when the nbias reaches threshold voltage of the transistor Nx, the current in the branches ‘lbias_x’ starts flowing. It takes even a longer time until the current in the lbias_x branch is fully settled.
FIG. 2 shows waveforms at key locations in the circuit of FIG. 1. As switch S1 is closed, switch S2 is opened, causing voltage at node nswitch to fall to ground before recovering to nbias that is between Vdd and 0V. The current lbias 2 is somewhat delayed beyond the start of nbias until the gate of the N2 transistor is brought up to a threshold voltage.